1. Field of the Invention
This invention relates generally to methods for manufacturing integrated circuits, and more particularly to optical and E-beam lithography methods used during the manufacture of integrated circuit devices.
2. Description of the Prior Art
Integrated circuit chips are generally produced, in bulk, on semiconductor wafers. A semiconductor wafer is, most commonly, a thin, disk-shaped piece of highly-polished, crystalline silicon. The wafer serves as a base or substrate for subsequent layers of semiconductive, insulating, and conductive materials which comprise an integrated circuit chip.
Crucial to the production of the various layers of an integrated circuit chip is a process known as lithography. In this process, a reactive film, such as photoresist, is applied to a wafer, and is subsequently exposed to some form of radiation. The reactive film undergoes chemical reactions which differentiate the portions of the film that were exposed to the radiation from the unexposed portions of the film. The film can then be chemically processed to remove differentiated portions of the film, leaving a pattern or mask on the the upper surface of the wafer for subsequent processing steps.
Currently, the most common form of integrated circuit lithography is known as "optical" lithography which exposes photoresist to radiation in the visible and ultraviolet (U.V.) regions. Far less common is electron beam or "E-beam" lithography which uses a beam of electrons to expose a reactive film. Other forms of lithography, such as "X-ray" lithography, are also known, but are rarely used except in experimental applications
Optical lithography is a fairly mature technology, and is well-adapted for full-scale mass production of semiconductor devices. With optical lithography, a reticle or mask is made having the pattern of a particular layer on a semiconductor wafer. Electromagnetic radiation in the visible or U.V. range is projected through the mask or reticle onto a film of photoresist which has been applied over the top surface of a semiconductor wafer. The photoresist is then developed in preparation for subsequent processing steps.
While optical lithography, as mentioned previously is well-adapted for full-scale mass production, it is presently limited to producing integrated circuit devices having feature sizes of approximately 0.8 microns or larger. This limiting factor is due to diffraction problems caused by the relatively long wavelengths of visible and ultraviolet light. As circuit designers develop denser integrated circuit devices with smaller feature sizes and more components per unit area, it becomes increasingly important to be able to produce integrated circuit chips having feature dimensions that are a small fraction of a micron.
Smaller feature sizes can be produced by using lithography processes which have higher resolution than optical lithography. E-beam lithography, due to the short wavelength of electron beams, is well-suited to this purpose. Furthermore, E-beam lithography has the advantage of not requiring masks or reticles to produce a pattern on the reactive film. Instead, a "pattern" data base is stored within a digital memory of an E-beam device, and an E-beam is scanned across a surface of the wafer in accordance with the pattern by means of electrostatic or electromagnetic deflectors.
Despite the many advantages of E-beam lithography, it is a relatively slow process and thus is not well suited for the mass production of integrated circuit devices. This is due, in part, to the fact that direct-write E-beam lithography is a sequential process involving the scanning of an electron beam across the surface of the wafer to form a pattern; as opposed to the single step process of optical lithography, where substantial areas of the wafer are exposed simultaneously to form a pattern. In consequence, E-beam lithography is used commercially only for low volume, specialized devices.
In order to gain advantages of both optical lithography and E-beam lithography, "hybrid" lithography techniques have been developed. With hybrid lithography, some features of an integrated circuit are exposed by optical lithography techniques, while other features are exposed by E-beam lithography techniques.
The major problem encountered in hybrid lithography is that of registration between the optically exposed features and the E-beam exposed features. Due to imperfections of the optics used for optical lithography, the optically formed features are distorted and therefore do not correspond to the idealized pattern stored in the pattern data base of the E-beam lithography machine. As integrated circuit feature sizes become smaller, there is an increasing likelihood that there will be a failure of the registration between the distorted, optically formed features and subsequent E-beam formed features, resulting in an inoperative device.
As mentioned previously, optical distortion during the optical lithography step is one source of registration error in hybrid lithography. Another source of registration error is due to cumulative stage movement errors of the X-Y stage which supports the semiconductor wafer.
Historically, the first step towards solving the registration problem was the matching of an E-beam deflector to the optically patterned wafer. For example, in an article entitled "Device Fabrication with the Stereoscan" of Wolf, et al., teaches the manual use of registration marks in electron lithography. Other articles teaching the matching of an E-beam deflector to a wafer include "Automatic Patterning Position of Scanning Electron Beam Exposure" of Mivauchi, et al., IEEE Transactions on Electron Devices, Vol. E-D-17, No. 6 (1970); and "Electron Beam Fabrication of Micron Transistors" of Magdo, et al., IBM, J. Res. Develop. Paper (1971).
Another article, "Computer-Controlled Scanning Electron Microscope System for High-Resolution Microelectronic Pattern Fabrication" of Ozdemir, et al., IEEE Transactions on Electron Devices, Vol. E-D-19, No. 5 (1972) teaches a method of hybrid lithography in multi-field chips. Ozdemir, et al. circumvented the problem of calibrating the stage to the optically-formed pattern by placing registration marks within the chip itself. While this technique works, it is not particularly desirable since it occupies valuable chip real estate and reduces the maximum density of an integrated circuit device.
Other articles pertaining to the registration problem include "E-Beam Writing Techniques for Semiconductor Device Fabrication" of Varnell, et al., Journal of Vacuum Science Technology, Volume 10, No. 6 (1973), and "Automatic Registration in an Electron-Beam Lithographic System" of Davis, et al., IBM Journal of Research and Development (1977).
Once the data is obtained, by any appropriate means, for matching the E-beam deflector to the optically patterned substrate, the problem remains of transforming the pattern data base of the E-beam lithograph machine. In an article entitled "Computer-Controlled Electron Beam Micro fabrication Machine with a New Registration System" of Saitou, et al., Journal of Physics, E Scientific Instruments 7 (1974), linear matrix transformations are disclosed for this purpose.
Another prior art approach to the registration problem found is the matching of the stage to the deflector of an E-beam lithography device. Frequently, the stage position is determined by means of a laser interferometer, as is described in "High Performance Step and Repeat Machine Using an Electron Beam and Laser Interferometers" of Cahen, et al., 4th International Conference of The Electrochemical Society (1970).
One of the earliest references which describes a stage and deflector matching process is "Control System Design and Alignment Methods for Electron Lithography" by Alles, et al., Journal of Vacuum Science Technology, Vol. 2, No. 6 (1975). While the Alles, et al. article was influential since it was used on a very popular E-beam lithography instrument, it suffered from two major limitations. First, Alles, et al. does not take into account the distortions produced by the beam deflector, and consequently the method can only be used with very small deflection fields. Second, Alles, et al. fails to take into account the effects of variation in substrate height.
In an article entitled "Distortion Correction and Deflection Calibration by Means of Laser Interferometry in an Electron-Beam Exposure System" of Asai, et al., Journal of Vacuum Science Technology, 16(6) (1979), the problems of distortion by the beam deflector were subsequently addressed. In "Distortion Correction and Overlay Accuracies Achieved by the Registration Method Using Two-Stage Standard Mark System" of Takamoto, et al. in the Journal of Vacuum Science Technology, B4(3), 1986, the problem of height variation in the substrate was addressed.
In "A Comparison of Pattern Stitching by Subfield Registration and Laser Interferometer Servo Control" of Wilson, et al., Electron Ion Beam Science and Technology, 8th International Conference Edition (1978) and in a similar article entitled "Stitching with Overlay in Direct Wafer Writing Using Scanning Electron Beam" of Wilson, et al. in the Electron and Ion Beam Science and Technology 9th International Conference (1980), a method is described for using an electron lithography machine for writing multifield hybrid chips. The method involved matching the E-beam stage to the substrate by finding fiducial marks in the optically exposed substrate by moving the stage in a search pattern. In a separate calibration procedure, the stage was matched to the E-beam deflector by methods similar to those previously described.
From the above discussion, it should be apparent that there has been widespread research into the problem of registration between optically-exposed features and E-beam exposed features in hybrid lithography. The Wolf. et al., Mivauchi, et al., Maodo, et al., Ozdemir, et al., Varnell, et al., Saitou, et al., and Davis, et al. articles all address the problem of calibrating an E-beam lithography machine's deflector to an optically-patterned substrate. Alles, et al., Asai, et al., and Takamoto, et al. teach the matching of an E-beam lithography machine's deflector to its stage. Finally, Wilson, et al. in their two articles, describe the matching of an E-beam lithography machine's stage to an optically-patterned substrate.
From the foregoing, it is clear that there has been a long-felt need for a hybrid lithographic process which solves the registration problem. Although some progress towards this goal has been made, the prior art has failed to develop a practical, commercial registration process for use during the manufacture of integrated circuits by hybrid lithographic techniques.